A new method of fabricating gallium arsenide MOS devices

Robert P. H. Chang; J. J. Coleman

doi:10.1063/1.90040

A new method of fabricating gallium arsenide MOS devices

Robert P. H. Chang, J. J. Coleman

Northwestern University

Research output: Contribution to journal › Article

23 Citations (Scopus)

Abstract

A new method of fabricating gallium arsenide MOS devices with improved electrical properties is discussed. The device consists of a gallium arsenide substrate overlaid with a gallium arsenic oxide, a thin aluminum oxide, and a metallic contact. The oxide layers are fabricated using a plasma oxidizing process. These MOS devices show very high breakdown voltages (typically ≈±4×10⁶ V/cm) and have low surface-state densities (≈5×10¹⁰ cm^-2).

Original language	English
Pages (from-to)	332-333
Number of pages	2
Journal	Applied Physics Letters
Volume	32
Issue number	5
DOIs	https://doi.org/10.1063/1.90040
Publication status	Published - 1978

ASJC Scopus subject areas

Physics and Astronomy (miscellaneous)

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10.1063/1.90040

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Chang, R. P. H., & Coleman, J. J. (1978). A new method of fabricating gallium arsenide MOS devices. Applied Physics Letters, 32(5), 332-333. https://doi.org/10.1063/1.90040

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