TY - GEN
T1 - Gate-tunable memristors from monolayer MoS2
AU - Sangwan, Vinod K.
AU - Lee, Hong Sub
AU - Hersam, Mark C.
N1 - Funding Information:
This research was supported by the National Science Foundation MRSEC (DMR-1121262) and 2-DARE program (EFRI-1433510). H.-S.L. also acknowledges the Basic Science Research Program of the National Research Foundation of Korea (NRF) that is funded by the Ministry of Education (2017R1A6A3A03008332).
PY - 2018/1/23
Y1 - 2018/1/23
N2 - We report here gate-tunable memristors based on monolayer MoS2 grown by chemical vapor deposition (CVD). These memristors are fabricated in a field-effect geometry with the channel consisting of poly crystalline MoS2 films with grain sizes of 3-5 μm. The device characteristics show switching ratios up to ∼500, with the resistance in individual states being continuously gate-tunable by over three orders of magnitude. The resistive switching results from dynamically varying threshold voltage and Schottky barrier heights, whose underlying physical mechanism appears to be vacancy migration and/or charge trapping. Top-gated devices achieve reversible tuning of threshold voltage, with potential utility in non-volatile memory or neuromorphic architectures.
AB - We report here gate-tunable memristors based on monolayer MoS2 grown by chemical vapor deposition (CVD). These memristors are fabricated in a field-effect geometry with the channel consisting of poly crystalline MoS2 films with grain sizes of 3-5 μm. The device characteristics show switching ratios up to ∼500, with the resistance in individual states being continuously gate-tunable by over three orders of magnitude. The resistive switching results from dynamically varying threshold voltage and Schottky barrier heights, whose underlying physical mechanism appears to be vacancy migration and/or charge trapping. Top-gated devices achieve reversible tuning of threshold voltage, with potential utility in non-volatile memory or neuromorphic architectures.
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U2 - 10.1109/IEDM.2017.8268330
DO - 10.1109/IEDM.2017.8268330
M3 - Conference contribution
AN - SCOPUS:85045216849
T3 - Technical Digest - International Electron Devices Meeting, IEDM
SP - 5.1.1-5.1.4
BT - 2017 IEEE International Electron Devices Meeting, IEDM 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 63rd IEEE International Electron Devices Meeting, IEDM 2017
Y2 - 2 December 2017 through 6 December 2017
ER -