Impact of boron diffusion through O2 and N2O gate dielectrics on the process margin of dual-poly low power CMOS

K. S. Krisch, L. Manchanda, F. H. Baumann, M. L. Green, D. Brasen, L. C. Feldman, A. Ourmazd

Research output: Contribution to journalConference articlepeer-review

24 Citations (Scopus)


This work evaluates the impact of boron penetration from p+-polysilicon on process margin and system performance. We experimentally demonstrate that small (3σ = ±3 angstroms) variations in gate oxide thickness, coupled with boron penetration, can increase the spread in threshold voltages by ±100 mV or more. By inhibiting boron penetration, N2O-grown oxides are shown to improve VT control, thereby enhancing the process margin. We present a physically-based model to describe boron penetration as a function on tox, and analyze the impact of increased VT variation on subthreshold leakage current and on the resultant off-state power consumption.

Original languageEnglish
Pages (from-to)325-328
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting
Publication statusPublished - Dec 1 1994
EventProceedings of the 1994 IEEE International Electron Devices Meeting - San Francisco, CA, USA
Duration: Dec 11 1994Dec 14 1994

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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