Compression of two‐electron integral data is used to reduce integral storage and I/O requirements with FPS M64 Series (formerly FPS‐X64) processors. Schemes are developed and implemented in assembly language to compress floating‐point values to a fixed‐point accuracy, and unsigned integer numbers. The floating‐point scheme stores only the significant bits of the mantissa and a short, biased exponent. The unsigned integers are packed into fixed‐length fields just long enough to hold the largest value. The packing procedures are tested on FPS‐164 and FPS‐264 processors (since renamed M64/145 and M64/60 by FPS) and incorporated into HONDO to compress two‐electron integral files. Reduction factors of 0.2–0.4 are obtained for floating‐point compression and 0.3–0.5 for index packing, with typical overall factors around one‐third. The advantages of improved I/O and storage efficiency are accompanied by a small increase in processor time to perform the packing and unpacking. Timing changes for HONDO are presented, and both packing schemes dramatically reduce SCF elapsed times with FPS‐264 processors. It is concluded that compression effectively extends external storage capacities, improves I/O efficiency, and can reduce the elapsed time of I/O bound calculations.
ASJC Scopus subject areas
- Computational Mathematics