Chu Liang Cheng, Robert P. H. Chang, B. Tell, S. M. Zima, Y. Ota, G. P. Vella-Coleiro, R. C. Miller, J. L. Zilko, B. L. Kasper, K. F. Brown-Goebeler, V. D. Mattera

Research output: Contribution to journalArticle


A monolithically integrated In//0//. //5//3Ga//0//. //4//7As p-i-n-amplifier fabricated on n-InP substrates is discussed. The structure utilizes a vertical integration of p-i-n-diode and recessed-gate InP MISFETs, yet with a planar surface for fine-line photolithography. The preamplifier consists of a gain stage and a buffer stage, both made of InP MISFETs with aluminum phosphorus oxide as gate insulator. This is by far the most complex integrated optoelectronic circuit on InP ever reported. At 400 Mb/s, the receiver sensitivity is better than minus 27 dBm for 1 multiplied by 10** minus **9 bit-error rate.

Original languageEnglish
JournalIEEE Transactions on Electron Devices
Issue number11
Publication statusPublished - Nov 1987

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Physics and Astronomy (miscellaneous)

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    Cheng, C. L., Chang, R. P. H., Tell, B., Zima, S. M., Ota, Y., Vella-Coleiro, G. P., Miller, R. C., Zilko, J. L., Kasper, B. L., Brown-Goebeler, K. F., & Mattera, V. D. (1987). MONOLITHICALLY INTEGRATED RECEIVER FRONT-END: IN//0//. //5//3GA//0//. //4//7AS PIN-AMPLIFIER. IEEE Transactions on Electron Devices, ED-34(11).