Selective electroless copper metallization of palladium silicide on silicon substrates

C. Y. Mak, B. Miller, Leonard C Feldman, B. E. Weir, G. S. Higashi, E. A. Fitzgerald, T. Boone, C. J. Doherty, R. B. Van Dover

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Abstract

A scheme for selective electroless copper patterning of Si wafers has been developed with palladium silicide as the catalytic layer initiating copper deposition. Thermal conversion of a palladium layer to silicides on a SiO 2 patterned silicon substrate, followed by an acid etching of the unreacted palladium on the SiO2 surfaces, leaves only the silicided regions at the base of the windows for electroless copper deposition. Excellent via-filling down to 0.5-μm dimensions and an aspect ratio of 6 has been demonstrated. The thin copper deposited on the Pd2Si has a resistivity of ∼2.0 μΩ cm. Contactless photocarrier decay measurements indicate virtually no degradation of Si lifetimes by these processing steps.

Original languageEnglish
Pages (from-to)3449-3451
Number of pages3
JournalApplied Physics Letters
Volume59
Issue number26
DOIs
Publication statusPublished - 1991

ASJC Scopus subject areas

  • Physics and Astronomy (miscellaneous)

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    Mak, C. Y., Miller, B., Feldman, L. C., Weir, B. E., Higashi, G. S., Fitzgerald, E. A., Boone, T., Doherty, C. J., & Van Dover, R. B. (1991). Selective electroless copper metallization of palladium silicide on silicon substrates. Applied Physics Letters, 59(26), 3449-3451. https://doi.org/10.1063/1.105674