Self-assembled nanodielectrics and silicon nanomembranes for low voltage, flexible transistors, and logic gates on plastic substrates

Hoon Sik Kim, Sang Min Won, Young Geun Ha, Jong Hyun Ahn, Antonio Facchetti, Tobin J Marks, John A. Rogers

Research output: Contribution to journalArticle

23 Citations (Scopus)

Abstract

This letter reports the fabrication and electrical characterization of mechanically flexible and low operating voltage transistors and logic gates (NOT, NAND, and NOR gates) using printed silicon nanomembranes and self-assembled nanodielectrics on thin plastic substrates. The transistors exhibit effective linear mobilities of ∼680 cm2 /V s, on/off ratios > 107, gate leakage current densities 2, and subthreshold slopes ∼120 mV/decade. The inverters show voltage gains as high as 4.8. Simple digital logic gates (NAND and NOR gates) demonstrate the possible application of this materials combination in digital integrated circuits.

Original languageEnglish
Article number183504
JournalApplied Physics Letters
Volume95
Issue number18
DOIs
Publication statusPublished - 2009

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low voltage
logic
transistors
plastics
silicon
inverters
electric potential
integrated circuits
leakage
current density
slopes
fabrication

ASJC Scopus subject areas

  • Physics and Astronomy (miscellaneous)

Cite this

Self-assembled nanodielectrics and silicon nanomembranes for low voltage, flexible transistors, and logic gates on plastic substrates. / Kim, Hoon Sik; Won, Sang Min; Ha, Young Geun; Ahn, Jong Hyun; Facchetti, Antonio; Marks, Tobin J; Rogers, John A.

In: Applied Physics Letters, Vol. 95, No. 18, 183504, 2009.

Research output: Contribution to journalArticle

Kim, Hoon Sik ; Won, Sang Min ; Ha, Young Geun ; Ahn, Jong Hyun ; Facchetti, Antonio ; Marks, Tobin J ; Rogers, John A. / Self-assembled nanodielectrics and silicon nanomembranes for low voltage, flexible transistors, and logic gates on plastic substrates. In: Applied Physics Letters. 2009 ; Vol. 95, No. 18.
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