Abstract
Over the past two decades, extensive research on single-walled carbon nanotubes (SWCNTs) has elucidated their many extraordinary properties, making them one of the most promising candidates for solution-processable, high-performance integrated circuits. In particular, advances in the enrichment of high-purity semiconducting SWCNTs have enabled recent circuit demonstrations including synchronous digital logic, flexible electronics and high-frequency applications. However, due to the stringent requirements of the transistors used in complementary metal-oxide-semiconductor (CMOS) logic as well as the absence of sufficiently stable and spatially homogeneous SWCNT thin-film transistors, the development of large-scale SWCNT CMOS integrated circuits has been limited in both complexity and functionality. Here, we demonstrate the stable and uniform electronic performance of complementary p-type and n-type SWCNT thin-film transistors by controlling adsorbed atmospheric dopants and incorporating robust encapsulation layers. Based on these complementary SWCNT thin-film transistors, we simulate, design and fabricate arrays of low-power static random access memory circuits, achieving large-scale integration for the first time based on solution-processed semiconductors.
Original language | English |
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Pages (from-to) | 944-948 |
Number of pages | 5 |
Journal | Nature Nanotechnology |
Volume | 10 |
Issue number | 11 |
DOIs | |
Publication status | Published - Nov 1 2015 |
ASJC Scopus subject areas
- Bioengineering
- Biomedical Engineering
- Materials Science(all)
- Electrical and Electronic Engineering
- Condensed Matter Physics
- Atomic and Molecular Physics, and Optics