Wafer-scale solution-derived molecular gate dielectrics for low-voltage graphene electronics

Vinod K. Sangwan, Deep Jariwala, Ken Everaerts, Julian J. McMorrow, Jianting He, Matthew Grayson, Lincoln J. Lauhon, Tobin J Marks, Mark C Hersam

Research output: Contribution to journalArticle

19 Citations (Scopus)

Abstract

Graphene field-effect transistors are integrated with solution-processed multilayer hybrid organic-inorganic self-assembled nanodielectrics (SANDs). The resulting devices exhibit low-operating voltage (2 V), negligible hysteresis, current saturation with intrinsic gain >1.0 in vacuum (pressure <2 × 10-5 Torr), and overall improved performance compared to control devices on conventional SiO2 gate dielectrics. Statistical analysis of the field-effect mobility and residual carrier concentration demonstrate high spatial uniformity of the dielectric interfacial properties and graphene transistor characteristics over full 3 in. wafers. This work thus establishes SANDs as an effective platform for large-area, high-performance graphene electronics.

Original languageEnglish
Article number83503
JournalApplied Physics Letters
Volume104
Issue number8
DOIs
Publication statusPublished - 2014

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low voltage
graphene
wafers
electronics
control equipment
statistical analysis
transistors
field effect transistors
platforms
hysteresis
saturation
vacuum
electric potential

ASJC Scopus subject areas

  • Physics and Astronomy (miscellaneous)

Cite this

Wafer-scale solution-derived molecular gate dielectrics for low-voltage graphene electronics. / Sangwan, Vinod K.; Jariwala, Deep; Everaerts, Ken; McMorrow, Julian J.; He, Jianting; Grayson, Matthew; Lauhon, Lincoln J.; Marks, Tobin J; Hersam, Mark C.

In: Applied Physics Letters, Vol. 104, No. 8, 83503, 2014.

Research output: Contribution to journalArticle

Sangwan, VK, Jariwala, D, Everaerts, K, McMorrow, JJ, He, J, Grayson, M, Lauhon, LJ, Marks, TJ & Hersam, MC 2014, 'Wafer-scale solution-derived molecular gate dielectrics for low-voltage graphene electronics', Applied Physics Letters, vol. 104, no. 8, 83503. https://doi.org/10.1063/1.4866387
Sangwan, Vinod K. ; Jariwala, Deep ; Everaerts, Ken ; McMorrow, Julian J. ; He, Jianting ; Grayson, Matthew ; Lauhon, Lincoln J. ; Marks, Tobin J ; Hersam, Mark C. / Wafer-scale solution-derived molecular gate dielectrics for low-voltage graphene electronics. In: Applied Physics Letters. 2014 ; Vol. 104, No. 8.
@article{c359f596972846ea99c21be40e31e201,
title = "Wafer-scale solution-derived molecular gate dielectrics for low-voltage graphene electronics",
abstract = "Graphene field-effect transistors are integrated with solution-processed multilayer hybrid organic-inorganic self-assembled nanodielectrics (SANDs). The resulting devices exhibit low-operating voltage (2 V), negligible hysteresis, current saturation with intrinsic gain >1.0 in vacuum (pressure <2 × 10-5 Torr), and overall improved performance compared to control devices on conventional SiO2 gate dielectrics. Statistical analysis of the field-effect mobility and residual carrier concentration demonstrate high spatial uniformity of the dielectric interfacial properties and graphene transistor characteristics over full 3 in. wafers. This work thus establishes SANDs as an effective platform for large-area, high-performance graphene electronics.",
author = "Sangwan, {Vinod K.} and Deep Jariwala and Ken Everaerts and McMorrow, {Julian J.} and Jianting He and Matthew Grayson and Lauhon, {Lincoln J.} and Marks, {Tobin J} and Hersam, {Mark C}",
year = "2014",
doi = "10.1063/1.4866387",
language = "English",
volume = "104",
journal = "Applied Physics Letters",
issn = "0003-6951",
publisher = "American Institute of Physics Publising LLC",
number = "8",

}

TY - JOUR

T1 - Wafer-scale solution-derived molecular gate dielectrics for low-voltage graphene electronics

AU - Sangwan, Vinod K.

AU - Jariwala, Deep

AU - Everaerts, Ken

AU - McMorrow, Julian J.

AU - He, Jianting

AU - Grayson, Matthew

AU - Lauhon, Lincoln J.

AU - Marks, Tobin J

AU - Hersam, Mark C

PY - 2014

Y1 - 2014

N2 - Graphene field-effect transistors are integrated with solution-processed multilayer hybrid organic-inorganic self-assembled nanodielectrics (SANDs). The resulting devices exhibit low-operating voltage (2 V), negligible hysteresis, current saturation with intrinsic gain >1.0 in vacuum (pressure <2 × 10-5 Torr), and overall improved performance compared to control devices on conventional SiO2 gate dielectrics. Statistical analysis of the field-effect mobility and residual carrier concentration demonstrate high spatial uniformity of the dielectric interfacial properties and graphene transistor characteristics over full 3 in. wafers. This work thus establishes SANDs as an effective platform for large-area, high-performance graphene electronics.

AB - Graphene field-effect transistors are integrated with solution-processed multilayer hybrid organic-inorganic self-assembled nanodielectrics (SANDs). The resulting devices exhibit low-operating voltage (2 V), negligible hysteresis, current saturation with intrinsic gain >1.0 in vacuum (pressure <2 × 10-5 Torr), and overall improved performance compared to control devices on conventional SiO2 gate dielectrics. Statistical analysis of the field-effect mobility and residual carrier concentration demonstrate high spatial uniformity of the dielectric interfacial properties and graphene transistor characteristics over full 3 in. wafers. This work thus establishes SANDs as an effective platform for large-area, high-performance graphene electronics.

UR - http://www.scopus.com/inward/record.url?scp=84896772418&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84896772418&partnerID=8YFLogxK

U2 - 10.1063/1.4866387

DO - 10.1063/1.4866387

M3 - Article

AN - SCOPUS:84896772418

VL - 104

JO - Applied Physics Letters

JF - Applied Physics Letters

SN - 0003-6951

IS - 8

M1 - 83503

ER -