Wafer-scale solution-derived molecular gate dielectrics for low-voltage graphene electronics

Vinod K. Sangwan, Deep Jariwala, Ken Everaerts, Julian J. McMorrow, Jianting He, Matthew Grayson, Lincoln J. Lauhon, Tobin J. Marks, Mark C. Hersam

Research output: Contribution to journalArticle

20 Citations (Scopus)

Abstract

Graphene field-effect transistors are integrated with solution-processed multilayer hybrid organic-inorganic self-assembled nanodielectrics (SANDs). The resulting devices exhibit low-operating voltage (2 V), negligible hysteresis, current saturation with intrinsic gain >1.0 in vacuum (pressure < 2 × 10-5 Torr), and overall improved performance compared to control devices on conventional SiO2 gate dielectrics. Statistical analysis of the field-effect mobility and residual carrier concentration demonstrate high spatial uniformity of the dielectric interfacial properties and graphene transistor characteristics over full 3 in. wafers. This work thus establishes SANDs as an effective platform for large-area, high-performance graphene electronics.

Original languageEnglish
Article number083503
JournalApplied Physics Letters
Volume104
Issue number8
DOIs
Publication statusPublished - Jan 1 2014

ASJC Scopus subject areas

  • Physics and Astronomy (miscellaneous)

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    Sangwan, V. K., Jariwala, D., Everaerts, K., McMorrow, J. J., He, J., Grayson, M., Lauhon, L. J., Marks, T. J., & Hersam, M. C. (2014). Wafer-scale solution-derived molecular gate dielectrics for low-voltage graphene electronics. Applied Physics Letters, 104(8), [083503]. https://doi.org/10.1063/1.4866387